6B1DI3-Elect Design and Analy Engr 3 - 64Y-Microelectronics
El Segundo, California, United States | Posted: 4/17/2024
Indotronix is seeking a Onsite Job - ASIC/FPGA Design Verification Level 3 for a Job Opportunity in El Segundo,California
Job Description :
Required Skill Set :
• 5+ years of experience
• 1-2 years of UVM tool
• Cadence Xcelium verification tool
• 1-2 years of UVM tool
• Cadence Xcelium verification tool
Education Qualification :
Must have min Bachelor’s in Engineering (no exception, please do not submit candidates without)
Additional Details: Must have min 5 years of experience, please do not submit without, manager will reject (he’s interviews are thorough and so is his resume review, please thorough screen candidates). UVM experience is important and required. Manager highly likely to consider extending contract or converting the right candidate in future.
Must have min Bachelor’s in Engineering (no exception, please do not submit candidates without)
Additional Details: Must have min 5 years of experience, please do not submit without, manager will reject (he’s interviews are thorough and so is his resume review, please thorough screen candidates). UVM experience is important and required. Manager highly likely to consider extending contract or converting the right candidate in future.
Indotronix is an Equal Opportunity Employer
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Job Code
JPC - 172514
Posted Date
2024-04-17 05:38:57
Experience
1-9 years
Primary Skills
Cadence Xcelium verification tool
Salary
$69.00-$72.74
Contact Person
Vinay Raj
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